The physical substrate of AI — chips, HBM, racks, scale-up networks — whose generation-over-generation shifts (Hopper → Blackwell → Rubin) gate which model architectures and context lengths become economical.
Tensions
Compute (FLOPs) is the headline number in marketing, but memory bandwidth and scale-up domain size are usually what actually moves the frontier. Rack design lives at the intersection of mundane physics — cable density, weight, cooling — and frontier model possibility.
Related Concepts
scale-up domain | memory bandwidth | parallelism | inference economics